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Hardware Description
Table 2-1. 120 Pin Connector Pin Assignments (Cont’d)
Pin No.
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
Pin Name
SDA_0
GND
SPI_CLK
SPI_MISO
SPI_MOSI
SPI_SEL_A
GND
SPORT_TSCLK
SPORT_DT0
SPORT_TFS
SPORT_RFS
SPORT_DR0
SPORT_RSCLK
GND
PAR_CLK
PAR_FS2
PAR_A0
PAR_A2
GND
PAR_INT
PAR_WR
PAR_D0
PAR_D2
PAR_D4
Description
I 2 C Data 0. Daughter Board EEPROM must be connected to this
bus.
Connect to ground plane of board.
SPI Clock.
SPI Master In, Slave Out Data.
SPI Master Out, Slave In Data.
SPI Chip Select A. Use this to control the first device on the SPI
bus.
Connect to ground plane of board.
SPORT Transmit Clock.
SPORT Data Transmit 0. Primary SPORT Data from processor.
SPORT Transmit Frame Sync.
SPORT Receive Frame Sync.
SPORT Data Receive 0. Primary SPORT Data into processor.
SPORT Receive Clock
Connect to ground plane of board.
Clock for Synchronous Parallel Interface (PPI).
Synchronous (PPI) Parallel Frame Sync 2.
Parallel Address Bus Bit 0.
Parallel Address Bus Bit 2.
Connect to ground plane of board.
Parallel Interrupt. Used to trigger a non-periodic Parallel event.
Asynchronous Parallel Write Strobe.
Parallel Data Bus Bit 0.
Parallel Data Bus Bit 2.
Parallel Data Bus Bit 4.
SDP Breakout Board User Guide
2-7
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